1. Field of the Invention
This invention relates to a substrate for use in forming an electronic package.
2. Description of the Related Art
An electronic package typically includes a circuitized substrate with one or more active devices attached thereon; packages including only one device are known as Single Chip Modules (SCM), while packages including a plurality of devices are called Multi Chip Modules (MCM). The active device is typically a chip, a small piece of a wafer commonly made of Silicon, Germanium or Gallium Arsenide. Normally, the chip is protected in a package body formed from encapsulant.
As the speed of electronic packages increase, noise in the DC power and ground lines increasingly becomes a problem. To reduce this noise, passive components such as decoupling capacitors are often used to reduce power supply noise which occurs due to change in potential difference between the ground voltage and the power-supply voltage supplied to the active device. The decoupling capacitors are placed as close to the active device as practical to increase their effectiveness. Typically, the decoupling capacitors are directly integrated with the substrate.
Normally, the decoupling capacitors are surface-mountable devices (SMD""s) used in the so-called surface-mounting technique (SMT) in which the capacitors are directly secured to the substrate via two end contacts thereof. As the degree of integration become higher, bonding pads on the substrate for receiving passive components need to be marked according to the requirements of manufacturing process so as to provide grounds for preparing the material list and SOP (standard operation procedure).
In the field of SMT applications, areas on the substrate around the bonding pads 100 are usually printed with ink (such as white ink) to form text marks such as xe2x80x9cC1 xe2x80xa2 C3 xe2x80xa2 R2 xe2x80xa2 R4 xe2x80xa2 L6xe2x80x9d pictured in FIG. 1 for serving as indications during the SMT process wherein xe2x80x9cCxe2x80x9d, xe2x80x9cRxe2x80x9d and xe2x80x9cLxe2x80x9d stand for xe2x80x9ccapacitorxe2x80x9d, xe2x80x9cresistorxe2x80x9d, and xe2x80x9cinductancexe2x80x9d, respectively, and the attached number indicate the mounting order of each component. Furthermore, the conventional BGA substrate usually has a text mark (such as xe2x80x9cU1xe2x80x9d pictured in FIG. 2) and an irregular mark 110 (see FIG. 2) provided on the backside surface thereof. The irregular mark 110 will be located by a recognition system to indicate the position of pin 1.
However, in the field of semiconductor packaging, using marks formed by ink could lead to serious reliability problems because the bond between ink and substrate as well as the bond between ink and package body are both quite weak. Because of the coefficient of thermal expansion (CTE) mismatch, stress is created at the interface between the text mark and the substrate or package body as conventional packages experience temperature changes. The stress, in turn, results in the delamination of the ink-substrate or ink-encapsulant interface. After the ink-substrate or ink-encapsulant interface becomes delaminated, moisture from the environment diffuses through the plastic package body to the delaminated area. Once moisture accumulates in the package, rapid temperature increases will cause the moisture to vaporize and expand, thereby creating an internal pressure in the delaminated area which causes the surrounding plastic package body to crack. Besides, the ink marking may be scratched and become faint during shipping such that the contour of the ink marking changes too much to be identified.
Therefore, the present invention seeks to provide a substrate for use in forming an electronic package which overcomes, or at least reduces the above-mentioned problems of the prior art.
It is a primary object of the present invention to provide a substrate for use in forming an electronic package wherein the substrate is characterized by having a mark directly formed within bonding pads for indicating the type of to-be-mounted SMT.
It is another object of the present invention to provide a substrate for use in forming an electronic package having a metal paddle adapted for receiving a semiconductor chip wherein the substrate is characterized by having a mark directly formed within the metal paddle for indicating the position of pin 1.
The substrate in accordance with a preferred embodiment of the present invention comprising at least a pair of bonding pads adapted for receiving a surface-mountable device. The substrate is characterized in that the at least a pair of bonding pads has a mark formed therein.
The substrate in accordance with another preferred embodiment of the present invention comprising a metal paddle adapted for receiving a semiconductor chip. The substrate is characterized in that the metal paddle has at least a mark formed therein.
The xe2x80x9cmarkxe2x80x9d of the present invention may be a text mark or a graphical mark. The mark is preferably formed by etching. Since the mark is directly formed within the bonding pads or the metal paddle, thereby creating substantially no additional reliability problems.